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"BJT Device and Circuit Co-Optimization Enabling Bandgap Reference and ..."

Umanath Kamath et al. (2018)

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DOI: 10.1109/ESSDERC.2018.8486902

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-27

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  dblp key:
  - conf/essderc/KamathYYCJWLFS18
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  - https://dblp.org/rec/conf/essderc/KamathYYCJWLFS18
Umanath Kamath, Tao Yu, Wei Yao, Edward Cullen, John Jennings, Susan Wu, Peng Lim, Brendan Farley, Robert Bogdan Staszewski:
BJT Device and Circuit Co-Optimization Enabling Bandgap Reference and Temperature Sensing in 7-nm FinFET. ESSDERC 2018: 86-89

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