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"Improved power side channel attack resistance of a 128-bit AES engine with ..."

Arvind Singh et al. (2017)

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DOI: 10.1109/ESSCIRC.2017.8094523

access: closed

type: Conference or Workshop Paper

metadata version: 2017-11-14

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  dblp key:
  - conf/esscirc/SinghKMRDM17
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Arvind Singh, Monodeep Kar, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay:
Improved power side channel attack resistance of a 128-bit AES engine with random fast voltage dithering. ESSCIRC 2017: 51-54

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