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ORCID"Logic Design for On-Chip Test Clock Generation - Implementation Details ..."
Matthias Beck et al. (2005)
- Matthias Beck, Olivier Barondeau, Martin Kaibel, Frank Poehl, Xijiang Lin, Ron Press:
Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality. DATE 2005: 56-61
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