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"ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology."

Hossein Sarbishaei, Manoj Sachdev (2009)

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DOI: 10.1109/CICC.2009.5280729

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Hossein Sarbishaei, Manoj Sachdev:
ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology. CICC 2009: 697-700

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