"A 3.0 Gb/s/pin 4th generation F-chip with Toggle 5.0 ..."

Youngmin Jo et al. (2023)

> Home

Details and statistics

DOI: 10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185391

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsit/JoKKCPLSYPKLSKL23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsit/JoKKCPLSYPKLSKL23
Youngmin Jo, Anil Kavala, Tongsung Kim, Byung-Kwan Chun, Jungjune Park, Taesung Lee, Jungmin Seo, Manjae Yang, Taehyeon Park, Hyunjin Kwon, Cheolhui Lee, Younghoon Son, Junghwan Kwak, Younggyu Lee, Hwan-Seok Ku, Dae-Hoon Na, Changyeon Yu, Jonghoon Park, Jae-Hwan Kim, Hyojin Kwon, Chan-ho Kim, Moon-Ki Jung, Chanjin Park, Donghyun Seo, Moosung Kim, Seungjae Lee, Jin-Yub Lee, Dongku Kang, Chiweon Yoon, Sunghoi Hur:
A 3.0 Gb/s/pin 4^th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package. VLSI Technology and Circuits 2023: 1-2

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.