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"Intel PowerVia Technology: Backside Power Delivery for High Density and ..."

Walid M. Hafez et al. (2023)

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DOI: 10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185208

access: closed

type: Conference or Workshop Paper

metadata version: 2023-08-31

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  - conf/vlsit/HafezAAABBBBCCC23
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  - https://dblp.org/rec/conf/vlsit/HafezAAABBBBCCC23
Walid M. Hafez, P. Agnihotri, M. Asoro, M. Aykol, B. Bains, R. Bambery, M. Bapna, A. Barik, A. Chatterjee, P. C. Chiu, T. Chu, C. Firby, K. Fischer, M. Fradkin, Hannes Greve, A. Gupta, E. Haralson, M. Haran, Jeffery Hicks, A. Illa, M. Jang, S. Klopcic, M. Kobrinsky, B. Kuns, H.-h. Lai, G. Lanni, S.-H. Lee, N. Lindert, C.-l. Lo, Y. Luo, G. Malyavanatham, B. Marinkovic, Y. Maymon, M. Nabors, J. Neirynck, P. Packan, A. Paliwal, L. Pantisano, Leif Paulson, Padma Penmatsa, Chetan Prasad, Conor Puls, T. Rahman, R. Ramaswamy, S. Samant, Bernhard Sell, K. Sethi, F. Shah, M. Shamanna, K. Shang, Q. Li, M. Sibakoti, J. Stoeger, N. Strutt, R. Thirugnanasambandam, C. Tsai, X. Wang, A. Wang, S.-j. Wu, Q. Xu, X.-h. Zhong, S. Natarajan:
Intel PowerVia Technology: Backside Power Delivery for High Density and High-Performance Computing. VLSI Technology and Circuits 2023: 1-2

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