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"Built in Self Test Based Design of Wave-Pipelined Circuits in ASICs."
V. Vireen et al. (2009)
- V. Vireen, N. Venugopalachary, G. Seetharaman, B. Venkataramani:
Built in Self Test Based Design of Wave-Pipelined Circuits in ASICs. VLSI Design 2009: 473-478
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