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"On-chip MISR Compaction Technique to Reduce Diagnostic Effort and Test Time."

Jaidev Shenoy et al. (2019)

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DOI: 10.1109/VLSID.2019.00037

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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  dblp key:
  - conf/vlsid/ShenoyOSK19
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  - https://dblp.org/rec/conf/vlsid/ShenoyOSK19
Jaidev Shenoy, Kelly Ockunzzi, Virendra Singh, Kushal Kamal:
On-chip MISR Compaction Technique to Reduce Diagnostic Effort and Test Time. VLSID 2019: 106-111

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