"Hardware Accelerator for Dual Standard Deblocking Filter."

P. Saravanan et al. (2021)

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DOI: 10.1109/VLSID51830.2021.00041

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-26

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P. Saravanan, B. Syndia Priyadarshini, P. Vignesh Kanna, P. Vaishnavi:
Hardware Accelerator for Dual Standard Deblocking Filter. VLSID 2021: 210-215

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