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ORCID"FPGA Implementation of Low Power Parallel Multiplier."
Sanjiv Kumar Mangal et al. (2007)
- Sanjiv Kumar Mangal, Raghavendra B. Deshmukh
, Rahul M. Badghare, Rajendra M. Patrikar:
FPGA Implementation of Low Power Parallel Multiplier. VLSI Design 2007: 115-120
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