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"A Parallel and Accelerated Circuit Simulator with Precise Accuracy."

Peter M. Lee et al. (2002)

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DOI: 10.1109/ASPDAC.2002.994921

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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  dblp key:
  - conf/vlsid/LeeIHSTY02
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/LeeIHSTY02
Peter M. Lee, Shinji Ito, Takeaki Hashimoto, Junji Sato, Tomomasa Touma, Goichi Yokomizo:
A Parallel and Accelerated Circuit Simulator with Precise Accuracy. ASP-DAC/VLSI Design 2002: 213-218

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