"Relaxation Based Circuit Simulation Acceleration over CPU-FPGA."

Vinay B. Y. Kumar et al. (2016)

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DOI: 10.1109/VLSID.2016.84

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Vinay B. Y. Kumar, Kulshreshth Dhiman, Mandar Datar, Akash Pacharne, H. Narayanan, Sachin B. Patkar:
Relaxation Based Circuit Simulation Acceleration over CPU-FPGA. VLSID 2016: 409-414

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