"A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, ..."

Rajiv V. Joshi et al. (2000)

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DOI: 10.1109/ICVD.2000.812583

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Rajiv V. Joshi, Wei Hwang, S. C. Wilson, Ghavam V. Shahidi, Ching-Te Chuang:
A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, 0.25µm SOI Technology. VLSI Design 2000: 44-49

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