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"40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop ..."

Kedar Janardan Dhori et al. (2022)

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DOI: 10.1109/VLSID2022.2022.00050

access: closed

type: Conference or Workshop Paper

metadata version: 2022-09-29

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  - conf/vlsid/DhoriKLUCCPPN22
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  - https://dblp.org/rec/conf/vlsid/DhoriKLUCCPPN22
Kedar Janardan Dhori, Promod Kumar, Christophe Lecocq, Pascal Urard, Olivier Callen, Florian Cacho, Maryline Parra, Prashant Pandey, Daniel Noblet:
40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode. VLSID 2022: 216-221

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