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ORCID"A 1.8GHz Digital PLL in 65nm CMOS."
Biman Chattopadhyay, Anant S. Kamath, Gopalkrishna Nayak (2011)
- Biman Chattopadhyay, Anant S. Kamath, Gopalkrishna Nayak:
A 1.8GHz Digital PLL in 65nm CMOS. VLSI Design 2011: 47-51
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