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"Low Loss Gate Engineered Superjunction Insulated Gate Bipolar Transistor ..."

Shriharsh Prasad Behera, Mahesh Vaidya, Alok Naugarhiya (2024)

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DOI: 10.1109/VLSID60093.2024.00005

access: closed

type: Conference or Workshop Paper

metadata version: 2024-04-08

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Shriharsh Prasad Behera, Mahesh Vaidya, Alok Naugarhiya:
Low Loss Gate Engineered Superjunction Insulated Gate Bipolar Transistor for High Speed Application. VLSID 2024: 1-5

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