"A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS."

Takayuki Shibasaki et al. (2014)

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DOI: 10.1109/VLSIC.2014.6858400

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Takayuki Shibasaki, Win Chaivipas, Yanfei Chen, Yoshiyasu Doi, Takayuki Hamada, Hideki Takauchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura:
A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS. VLSIC 2014: 1-2

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