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"A 40nm CMOS 12b 200MS/s Single-amplifier Dual-residue Pipelined-SAR ADC."

Min-Jae Seo et al. (2019)

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DOI: 10.23919/VLSIC.2019.8778005

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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Min-Jae Seo, Ye-Dam Kim, Jae-Hyun Chung, Seung-Tak Ryu:
A 40nm CMOS 12b 200MS/s Single-amplifier Dual-residue Pipelined-SAR ADC. VLSI Circuits 2019: 72-

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