"A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel ..."

Laurent Millet et al. (2018)

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DOI: 10.1109/VLSIC.2018.8502290

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-26

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Laurent Millet, Stéphane Chevobbe, Caaliph Andriamisaina, Edith Beigné, Fabrice Guellec, Thomas Dombek, Lamine Benaissa, Edouard Deschaseaux, Marc Duranton, K. Benchehida, Mehdi Darouich, Maria Lepecq:
A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing. VLSI Circuits 2018: 245-246

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