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"A PVT-robust -59-dBc reference spur and 450-fsRMS jitter injection-locked ..."

Yongsun Lee et al. (2016)

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DOI: 10.1109/VLSIC.2016.7573550

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-16

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Yongsun Lee, Heein Yoon, Mina Kim, Jaehyouk Choi:
A PVT-robust -59-dBc reference spur and 450-fsRMS jitter injection-locked clock multiplier using a voltage-domain period-calibrating loop. VLSI Circuits 2016: 1-2

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