"A 387.6fs Integrated Jitter and -80dBc Reference Spurs Ring based PLL with ..."

Chen-Ting Ko et al. (2019)

Details and statistics

DOI: 10.23919/VLSIC.2019.8777946

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

a service of  Schloss Dagstuhl - Leibniz Center for Informatics