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"1.22mW/Gb/s 9.6Gb/s data jitter mixing forwarded-clock receiver robust ..."

Sang-Hye Chung, Lee-Sup Kim (2012)

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DOI: 10.1109/VLSIC.2012.6243831

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Sang-Hye Chung, Lee-Sup Kim:
1.22mW/Gb/s 9.6Gb/s data jitter mixing forwarded-clock receiver robust against power noise with 1.92ns latency mismatch between data and clock in 65nm CMOS. VLSIC 2012: 144-145

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