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"A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power ..."

William Andrew Simon et al. (2020)

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DOI: 10.1109/VLSI-SOC46417.2020.9344087

access: closed

type: Conference or Workshop Paper

metadata version: 2021-02-17

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  dblp key:
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William Andrew Simon, Alexandre Levisse, Marina Zapater, David Atienza:
A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance. VLSI-SOC 2020: 94-99

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