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"A minimum-latency block-serial architecture of a decoder for IEEE 802.11n ..."
Massimo Rovini et al. (2007)
- Massimo Rovini, Giuseppe Gentile, Francesco Rossi, Luca Fanucci:
A minimum-latency block-serial architecture of a decoder for IEEE 802.11n LDPC codes. VLSI-SoC 2007: 236-241
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