Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow."

Matteo Murgida et al. (2006)

> Home

Details and statistics

DOI: 10.1109/VLSISOC.2006.313207

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsi/MurgidaPRSS06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi/MurgidaPRSS06
Matteo Murgida, Alessandro Panella, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto:
Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow. VLSI-SoC 2006: 74-79

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.