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"Reduced-Code Techniques for On-Chip Static Linearity Test of SAR ADCs."

Renato S. Feitoza, Manuel J. Barragán, Salvador Mir (2019)

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DOI: 10.1109/VLSI-SOC.2019.8920377

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-28

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Renato S. Feitoza, Manuel J. Barragán, Salvador Mir:
Reduced-Code Techniques for On-Chip Static Linearity Test of SAR ADCs. VLSI-SoC 2019: 263-268

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