"Staggered latch bus: A reliable offset switched architecture for long ..."

Melvin Eze, Ozcan Ozturk, Vijaykrishnan Narayanan (2013)

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DOI: 10.1109/VLSI-SOC.2013.6673296

access: closed

type: Conference or Workshop Paper

metadata version: 2017-08-17

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Melvin Eze, Ozcan Ozturk, Vijaykrishnan Narayanan:
Staggered latch bus: A reliable offset switched architecture for long on-chip interconnect. VLSI-SoC 2013: 296-301

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