"Static ultra-low-voltage high-speed CMOS logic and latches."

Yngvar Berg (2010)

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DOI: 10.1109/VLSISOC.2010.5642610

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Yngvar Berg:
Static ultra-low-voltage high-speed CMOS logic and latches. VLSI-SoC 2010: 115-118

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