"Architecture exploration of 3D FPGA to minimize internal layer connection."

Motoki Amagasaki et al. (2015)

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DOI: 10.1109/VLSI-SOC.2015.7314401

access: closed

type: Conference or Workshop Paper

metadata version: 2017-10-18

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Motoki Amagasaki, Yuto Takeuchi, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi:
Architecture exploration of 3D FPGA to minimize internal layer connection. VLSI-SoC 2015: 110-115

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