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"Exploring area and total wirelength using a cell merging technique."

Kevin A. Cáceres Albinagorta et al. (2019)

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DOI: 10.1109/VLSI-SOC.2019.8920337

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-13

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  - conf/vlsi/AlbinagortaCCR19
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  - https://dblp.org/rec/conf/vlsi/AlbinagortaCCR19
Kevin A. Cáceres Albinagorta, Calebe Conceição, Carlos Silva Cárdenas, Ricardo A. L. Reis:
Exploring area and total wirelength using a cell merging technique. VLSI-SoC 2019: 329-334

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