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"High-Performance NoC Simulation Acceleration Framework Employing the ..."

Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar (2019)

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DOI: 10.1109/VLSI-DAT.2019.8741764

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

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Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar:
High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 Blocks. VLSI-DAT 2019: 1-4

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