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ORCID"Area compact 5T portless SRAM cell for high density cache in 65nm CMOS."
Jitendra Yadav et al. (2015)
- Jitendra Yadav, Pallavi Das, Abhinav Jain, Anuj Grover
:
Area compact 5T portless SRAM cell for high density cache in 65nm CMOS. VDAT 2015: 1-4
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