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"FPGA Implementation of a Novel Area Efficient FFT Scheme Using Mixed Radix ..."

Thilagavathy R et al. (2017)

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DOI: 10.1007/978-981-10-7470-7_9

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-17

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  dblp key:
  - conf/vdat/RSVB17
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Thilagavathy R, Susmitha Settivari, Venkataramani B, Bhaskar Manickam:
FPGA Implementation of a Novel Area Efficient FFT Scheme Using Mixed Radix FFT. VDAT 2017: 75-80

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