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"A monolithic 2.5-Gb/s clock and data recovery circuit based on Silicon ..."

Andrea Pallotta et al. (1998)

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DOI: 10.1117/12.321886

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-06

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  - conf/syben/PallottaCLT98
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Andrea Pallotta, Francesco Centurelli, Francesco Loriga, Alessandro Trifiletti:
A monolithic 2.5-Gb/s clock and data recovery circuit based on Silicon bipolar technology. SYBEN 1998: 183-190

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