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"Multiple clock domain synchronization for network on chip architectures."

Jabulani Nyathi, Souradip Sarkar, Partha Pratim Pande (2007)

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DOI: 10.1109/SOCC.2007.4545477

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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Jabulani Nyathi, Souradip Sarkar, Partha Pratim Pande:
Multiple clock domain synchronization for network on chip architectures. SoCC 2007: 291-294

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