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"A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply ..."

Yung-Wei Lin et al. (2012)

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DOI: 10.1109/SOCC.2012.6398351

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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  dblp key:
  - conf/socc/LinYHLCCHLLSWLH12
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  - https://dblp.org/rec/conf/socc/LinYHLCCHLLSWLH12
Yung-Wei Lin, Hao-I Yang, Mao-Chih Hsia, Yi-Wei Lin, Chien-Hen Chen, Ching-Te Chuang, Wei Hwang, Nan-Chun Lien, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply Write-assist. SoCC 2012: 218-223

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