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"Efficient scalable hardware architecture for highly performant encoded ..."

Hugues Wouafo et al. (2017)

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DOI: 10.1109/SIPS.2017.8109986

access: closed

type: Conference or Workshop Paper

metadata version: 2017-11-29

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Hugues Wouafo, Cyrille Chavet, Philippe Coussy, Robin Danilo:
Efficient scalable hardware architecture for highly performant encoded neural networks. SiPS 2017: 1-6

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