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"Design and analysis of the HF-RISC processor targeting voltage scaling ..."

Felipe Todeschini Bortolon et al. (2016)

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DOI: 10.1109/SBCCI.2016.7724047

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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  - conf/sbcci/BortolonFGBCHM16
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Felipe Todeschini Bortolon, Sergio Johann Filho, Matheus Gibiluka, Sergio Bampi, Ney Laert Vilar Calazans, Fabiano Passuelo Hessel, Matheus Trevisan Moreira:
Design and analysis of the HF-RISC processor targeting voltage scaling applications. SBCCI 2016: 1-6

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