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"Hardware Implementation on Field Programmable Gate Array of Two-Stage ..."

Tomasz Grzes, Maciej Kopczynski (2019)

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DOI: 10.1007/978-3-030-22815-6_38

access: closed

type: Conference or Workshop Paper

metadata version: 2019-07-05

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Tomasz Grzes, Maciej Kopczynski:
Hardware Implementation on Field Programmable Gate Array of Two-Stage Algorithm for Rough Set Reduct Generation. IJCRS 2019: 495-506

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