"A single-FPGA architecture for detecting heavy hitters in 100 Gbit/s ..."

Jose Fernando Zazo et al. (2017)

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DOI: 10.1109/RECONFIG.2017.8279770

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-19

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Jose Fernando Zazo, Sergio López-Buedo, Mario Ruiz, Gustavo Sutter:
A single-FPGA architecture for detecting heavy hitters in 100 Gbit/s ethernet links. ReConFig 2017: 1-6

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