"A Traversal Cache Framework for FPGA Acceleration of Pointer Data ..."

James Coole, John Robert Wernsing, Greg Stitt (2009)

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DOI: 10.1109/RECONFIG.2009.68

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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James Coole, John Robert Wernsing, Greg Stitt:
A Traversal Cache Framework for FPGA Acceleration of Pointer Data Structures: A Case Study on Barnes-Hut N-body Simulation. ReConFig 2009: 143-148

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