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"Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through ..."

Manuel E. Acacio et al. (2002)

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DOI: 10.1109/EMPDP.2002.994312

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
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  persistent URL:
  - https://dblp.org/rec/conf/pdp/AcacioGGD02
Manuel E. Acacio, José González, José M. García, José Duato:
Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration. PDP 2002: 368-375

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