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"Selective Clock-Gating for Low Power/Low Noise Synchronous Counters 1."

Pilar Parra Fernández, Antonio J. Acosta, Manuel Valencia-Barrero (2002)

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DOI: 10.1007/3-540-45716-X_45

access: closed

type: Conference or Workshop Paper

metadata version: 2022-06-03

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  dblp key:
  - conf/patmos/ParraAV02
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Pilar Parra Fernández, Antonio J. Acosta, Manuel Valencia-Barrero:
Selective Clock-Gating for Low Power/Low Noise Synchronous Counters 1. PATMOS 2002: 448-457

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