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"PAOA: A power and area optimization approach of reed-muller logic circuits."

Xiang Wang et al. (2017)

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DOI: 10.1109/MWSCAS.2017.8053192

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-05

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  dblp key:
  - conf/mwscas/WangLHWZZ17
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  - https://dblp.org/rec/conf/mwscas/WangLHWZZ17
Xiang Wang, Mingzhe Li, Zhenxue He, Weike Wang, Cheng Zhou, Zongmin Zhao:
PAOA: A power and area optimization approach of reed-muller logic circuits. MWSCAS 2017: 1394-1397

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