Stop the war!
Остановите войну!
for scientists:
default search action
"PLL-SAR: A New High-Speed Analog to Digital Converter Architecture."
Vladimir Veselý et al. (2023)
- Vladimir Veselý, Calvin Yoji Lee, Tejasvi Anand, Un-Ku Moon:
PLL-SAR: A New High-Speed Analog to Digital Converter Architecture. MWSCAS 2023: 84-88
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.