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"An area efficient 10-bit time mode hybrid DAC with current settling error ..."

Nivethithaa Ravikumar et al. (2015)

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DOI: 10.1109/MWSCAS.2015.7282103

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-26

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  dblp key:
  - conf/mwscas/RavikumarHLHL15
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  - https://dblp.org/rec/conf/mwscas/RavikumarHLHL15
Nivethithaa Ravikumar, Zaniar Hoseini, Kye-Shin Lee, S. I. Hariharan, Yong-Min Lee:
An area efficient 10-bit time mode hybrid DAC with current settling error compensation. MWSCAS 2015: 1-4

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