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"Xar-trek: run-time execution migration among FPGAs and heterogeneous-ISA CPUs."

Edson Horta et al. (2021)

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DOI: 10.1145/3464298.3493388

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-10

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  dblp key:
  - conf/middleware/HortaCVPBOR21
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  - https://dblp.org/rec/conf/middleware/HortaCVPBOR21
Edson Horta, Ho-Ren Chuang, Naarayanan Rao VSathish, Cesar Philippidis, Antonio Barbalace, Pierre Olivier, Binoy Ravindran:
Xar-trek: run-time execution migration among FPGAs and heterogeneous-ISA CPUs. Middleware 2021: 104-118

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