Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Cache-emulated register file: An integrated on-chip memory architecture ..."

Naifeng Jing et al. (2016)

> Home

Details and statistics

DOI: 10.1109/MICRO.2016.7783717

access: closed

type: Conference or Workshop Paper

metadata version: 2022-05-31

- view
  authority control:
- export record
  dblp key:
  - conf/micro/JingWFYJLL16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/micro/JingWFYJLL16
Naifeng Jing, Jianfei Wang, Fengfeng Fan, Wenkang Yu, Li Jiang, Chao Li, Xiaoyao Liang:
Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs. MICRO 2016: 14:1-14:12

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.