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"ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM ..."

Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi (2021)

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DOI: 10.1109/ISVLSI51109.2021.00045

access: closed

type: Conference or Workshop Paper

metadata version: 2021-08-30

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  dblp key:
  - conf/isvlsi/Shivanandamurthy21
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  - https://dblp.org/rec/conf/isvlsi/Shivanandamurthy21
Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi:
ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing. ISVLSI 2021: 200-205

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