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"CHESS: A Comprehensive Tool for CDFG Extraction and Synthesis of Low Power ..."

Nagarajan Ranganathan, Ravi Namballa, Narender Hanchate (2006)

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DOI: 10.1109/ISVLSI.2006.27

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/isvlsi/RanganathanNH06
Nagarajan Ranganathan, Ravi Namballa, Narender Hanchate:
CHESS: A Comprehensive Tool for CDFG Extraction and Synthesis of Low Power Designs from VHDL. ISVLSI 2006: 329-334

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